[OLPC-devel] Re: NAND flash controller speed.

[Tom Sylla]

Yes, that makes it a little faster. I was holding off on recommending 
that until I asked the silicon designers if it was safe (from the spec, 
it seems like it could cause problems, but other things may slow it down 
enough not to matter)

a new table at 66MHz:

1. default:
msr 0x8a000015 0xf7c
msr 0x8a000010 0xefe00000 0xffffe007
msr 0x8a00001c 0x111
msr 0x8a00001b 0x01110111

2. add a PCISB region config:
msr 0x88000029 0xefe00001 0xefe01000

3. make timings optimal:
msr 0x8a00001c 0x110
msr 0x8a00001b 0x01100110

4. Make timings ultra-optimal:
msr 0x8a00001c 0x010
msr 0x8a00001b 0x00100010

At 66MHz:
1. 3.16MB/s
2. 3.26MB/s
3. 3.26MB/s
4. 3.30MB/s
mount "time" of 256MB flash in config 3: 2.24s

and I always mean MiB when I write MB. sorry. :)

Tom

David Woodhouse wrote:
> On Fri, 2006-06-02 at 16:46 -0600, Tom Sylla wrote:
>> 3. make timings optimal:
>> msr 0x8a00001c 0x110
>> msr 0x8a00001b 0x01100110 
> 
> It's a small amount faster if you make those 0x010 and 0x00100010 resp.
> Any reason you didn't do that? There seems to be enough slack space
> between cycles already, without adding more :)
>