[OLPC-devel] Re: NAND flash controller speed.

[David Woodhouse]

On Fri, 2006-06-02 at 17:33 -0600, Tom Sylla wrote:
> Yes, that makes it a little faster. I was holding off on recommending 
> that until I asked the silicon designers if it was safe (from the spec, 
> it seems like it could cause problems, but other things may slow it down 
> enough not to matter) 

I did wonder if during a 'burst' 32-bit read it would lead to 4
consecutive cycles with RE# asserted, without ever deasserting it in
between. That doesn't seem to happen though, and I'm sure the docs
wouldn't say "you can set this to 0" on both the pre-cycle and
post-cycle hold times without a warning if that _were_ the case.

Surprisingly, it does also seem to work if I set them _all_ to zero.
It's just slow.

-- 
dwmw2