MMP2 Interrupt Controller forcing IRQ

Andrei E. Warkentin andrey.warkentin at
Mon Sep 26 21:52:55 EDT 2011

2011/9/26 Mitch Bradley <wmb at>:
> If you write 0x400 to APB_VIRT_BASE + 0x1d008, it will assert interrupt 56 .
> You can then clear it by writing 0x400 to APB_VIRT_BASE + 0x1d40c.
> This uses an inter-processor communication unit.  Presumably the FIG handler
> would assert the interrupt and the IRQ 56 handler would clear it.

Awesome! Thanks a lot!!!


More information about the Devel mailing list