Entirely untested and not working suspend code

Jordan Crouse jordan.crouse at amd.com
Sat Jan 6 19:56:00 EST 2007


On 07/01/07 05:05 +0800, Mitch Bradley wrote:
> Jordan,
> 
> I'm learning a lot by reading your patch, but there are a couple of 
> things that puzzle me.
> 
> In olpc_sleep_asm(void), the first instruction adds 8 to register EBX, 
> but that register hasn't been set.
> At the bottom I see ': : "b" (acpi_base)', but there is no reference in 
> the code to "%0" to use it.  I wonder
> if you meant to include a line like this at the beginning:

As per the always informative
http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html

When specifying a register operand constraint, one can either specify "r"
for any GPR or "a", "b", "c", "d", "s", or "D" for a specific GPR.  The
assembly dump of the binary shows the voodoo that __asm__ does:

0xc010c076 <olpc_enter_sleep_state+54>:	mov    %edx,%ebx
0xc010c078 <olpc_enter_sleep_state+56>:	add    $0x8,%bx

> I'm guessing that the inl and outl code in this assembler sequence is 
> meant to be
> accessing the PM_CNT1 register.  Perhaps the code should be setting the 
> SLP_EN  bit?

> If so, maybe you need something lik this before the "outl":
> 
>    or $0x2000, %%ax

Wow - that explains a lot. You're absolutely right - the 
"or $0x2000, %%ax\n\t" should go right after the third instruction
(the first inl).  Recall that after the last wrmsr, the memory is in
self refresh, so we're running out of the cache at that point, and the
fewer instructions, the better.

Nice catch - thanks. 

Jordan

-- 
Jordan Crouse
Senior Linux Engineer
Advanced Micro Devices, Inc.
<www.amd.com/embeddedprocessors>





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