[OLPC-devel] NAND Flash Performance: IDE Interface Hack

[Mark J. Foster]

Hi, Dave!

I'm moving forward on a new ASIC that I call CAFE.  I haven't been 
posting too much about it yet, because if we go this route, it would 
probably also contain a couple of additional peripheral interfaces that 
we're not ready to commit to for inclusion in the machine just yet.  If 
these interfaces are included, though, combining the NAND controller 
with the new interfaces yields excellent pricing.

The progress in this regard is actually quite promising, with a vendor 
that wants to make it happen, but we're obviously facing a heinously 
tight schedule.  Within a few days, we should know if this is a real 
solution or not.  Performance-wise, this solution would connect via the 
PCI bus, so it should deliver near-optimal performance for a 33 MHz PCI 
bus (66 MHz isn't worth the power tradeoff).

I'll update folks once we have a clearer direction.

Cheers!
MarkF