[PATCH] gxfb: Turn on the flatpanel power and data

[Jordan Crouse]

Commit:     d28749036c341696a3ed984e74d69c5d8ab82a1e
Parent:     823c57b5623976191f8f8ae0c1df796f9ceb5c03
commit d28749036c341696a3ed984e74d69c5d8ab82a1e
Author:     Jordan Crouse <jordan.crouse at amd.com>
AuthorDate: Tue Aug 8 09:47:59 2006 -0600
Commit:     Jordan Crouse <jordan.crouse at amd.com>
CommitDate: Tue Aug 8 09:48:27 2006 -0600

    [PATCH] gxfb: Turn on the flatpanel power and data
    
    For Geode devices without a flatpanel aware BIOS, this enables the flatpanel
    power and data.
    
    Signed-off-by: Jordan Crouse <jordan.crouse at amd.com>
---
 drivers/video/geode/video_gx.c |   13 +++++++++++--
 drivers/video/geode/video_gx.h |    2 ++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/video/geode/video_gx.c b/drivers/video/geode/video_gx.c
index e6a4c70..ed6a174 100644
--- a/drivers/video/geode/video_gx.c
+++ b/drivers/video/geode/video_gx.c
@@ -220,7 +220,13 @@ gx_configure_tft(struct fb_info *info) {
 	/*  Set the dither control */
 	writel(0x70, par->vid_regs + GX_FP_DFC);
 
-	/* Turn on the device */
+	/* Enable the FP data and power (in case the BIOS didn't) */
+
+	fp = readl(par->vid_regs + GX_DCFG);
+	fp |= GX_DCFG_FP_PWR_EN | GX_DCFG_FP_DATA_EN;
+	writel(fp, par->vid_regs + GX_DCFG);
+
+	/* Unblank the panel */
 
 	fp = readl(par->vid_regs + GX_FP_PM);
 	fp |= GX_FP_PM_P;
@@ -245,9 +251,12 @@ static void gx_configure_display(struct 
 	writel(misc, par->vid_regs + GX_MISC);
 
 	/* Write the display configuration */
-
 	dcfg = readl(par->vid_regs + GX_DCFG);
 
+	/* Disable hsync and vsync */
+	dcfg &= ~(GX_DCFG_VSYNC_EN | GX_DCFG_HSYNC_EN);
+	writel(dcfg, par->vid_regs + GX_DCFG);
+
 	/* Clear bits from existing mode. */
 	dcfg &= ~(GX_DCFG_CRT_SYNC_SKW_MASK
 		  | GX_DCFG_CRT_HSYNC_POL   | GX_DCFG_CRT_VSYNC_POL
diff --git a/drivers/video/geode/video_gx.h b/drivers/video/geode/video_gx.h
index 119d0ab..ce28d8f 100644
--- a/drivers/video/geode/video_gx.h
+++ b/drivers/video/geode/video_gx.h
@@ -25,6 +25,8 @@ #  define GX_DCFG_CRT_EN		0x00000001
 #  define GX_DCFG_HSYNC_EN		0x00000002
 #  define GX_DCFG_VSYNC_EN		0x00000004
 #  define GX_DCFG_DAC_BL_EN		0x00000008
+#  define GX_DCFG_FP_PWR_EN		0x00000040
+#  define GX_DCFG_FP_DATA_EN		0x00000080
 #  define GX_DCFG_CRT_HSYNC_POL		0x00000100
 #  define GX_DCFG_CRT_VSYNC_POL		0x00000200
 #  define GX_DCFG_CRT_SYNC_SKW_MASK	0x0001C000