[Openec] Few questions about KB3700/3926

[Frieder Ferlemann]

Hi Richard,

Richard A. Smith schrieb:
> Maxim Levitsky wrote:
>> No, I figured that out. First bank (0x0000-0x4000) is switched
>> between 4 areas in SPI flash chip 00K, 64K, 80K, 96K
>>
>> other banks are mapped normally.
> 
>> Or in other words 00-64K contains regular firmware, and 3 additional
>>  areas on top of that are mapped at 0x0000 (each area has to be 16K
>> since this is limitation of XSEGn)
> 
> This is really good news.  Frieder said that he thought this would work
> but now we have a real world example.  I think if I structure things 

This is not news though (or only news for KB3926).

OpenEC uses this feature to read the manufacturing data (at the end of the
flash) with the KB3700.
(file manufacturing.c and/or the dump on the OpenEC wiki page)

I once speculated on the existance two additional registers
XBISEG2 and XBISEG3 which are not mentioned in the doc.

(These seem to be not implemented. Using XBISEG2 instead of XBISEG1 in:
http://dev.laptop.org/git?p=projects/openec;a=blob;f=flash.c;hb=HEAD
won't work)

Greetings,
Frieder