[linux-mm-cc] [patch] compcache: arch wirh data cache aliases

[Nitin Gupta]

Hi,

On Thu, Oct 30, 2008 at 8:30 PM, Dmitry Adamushko
<dmitry.adamushko at gmail.com> wrote:
> the current code doesn't work properly (resulting in random user-space
> crashes) on architectures where 'data cache aliasing' is possible and
> not automatically addressed in hardware. Normally, it's embedded cpus
> with virtually indexed data caches (e.g. many mips-based systems).
>

x86 really spoils you. I didn't even think of these things :)

> Now, there are 2 patches in attachment:
>
> (1) flush_dcache-shouldbe.patch -- should be the right solution but
> doesn't work for me.
>
> (2) flush_dcache-works.patch -- works for me.
>
> Basically, flush_dcache_page() (1) should eventually result in a call
> to flush_data_cache_page() (2)  [ which does a flush ] but it looks
> like something is broken wrt additional logic that may delay the
> actual 'flush' action. Maybe it's specific to our setup though. Need
> to be investigated further.
>

patch (1) doesn't work since flush_dcache_page() does *not* call
flush_data_cache_page() since mapping_mapped() always returns false
for swap-cache pages. So, it just sets "dcache dirty" bit and returns.

> Anyway, in the mean time (2) [ brutal force ] seems to be solving
> random crashes here and I wonder if (1) works for others (if similar
> problems were reported before).
>
> In any case, flushing dcaches one way or another is required for
> aforementioned systems.

Adding direct call to flush_data_cache_page() (as in patch 2) is not
possible since it will break compilation on archs not providing this
function (like x86!). I couldn't yet find a way to do this dcache
flushing without breaking code on other archs. I see that only these
archs: ARM, MIPS, Parsic, Spac64, xtensa do such check on page mapping
in flush_dcache_page().

I will try to fix this to make it work on arm, mips at least.

I think this fix should resolve long pending Issue #2 and #11:
http://code.google.com/p/compcache/issues/detail?id=2

Thanks,
Nitin