LinuxBIOS-1.1.8.0Fallback Thu Aug 3 20:46:25 CDT 2006 starting... done cpuRegInit Ram1.00 Ram2.00 computed msr.hi 10075012 Ram3 Ram4 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.1.8.0Fallback Thu Aug 3 20:46:25 CDT 2006 booting... end 5d34cf73, start 0 32-bit delta 726 calibrate_tsc 32-bit result is 726 clocks_per_usec: 726 Enumerating buses... scan_static_bus for Root Device gx2 north: enable_dev DEVICE_PATH_APIC_CLUSTER gx2 north: end enable_dev APIC_CLUSTER: 0 enabled gx2 north: enable_dev DEVICE_PATH_PCI_DOMAIN Enter northbridgeinit writeglmsr: write msr 0x10000020, val 0x20000000:0x000fff80 writeglmsr: AFTER write msr 0x10000020, val 0x20000000:0x000fff80 writeglmsr: write msr 0x10000021, val 0x20000000:0x080fffe0 writeglmsr: AFTER write msr 0x10000021, val 0x20000000:0x080fffe0 writeglmsr: write msr 0x1000002c, val 0x20000000:0x00000003 writeglmsr: AFTER write msr 0x1000002c, val 0x20000000:0x00000003 sizeram: 10075012:00003400 sizeram: sizem 0x80 SysmemInit: enable for 128m bytes SysmemInit: AFTER write msr 0x10000028, val 0x20000007:0xfdf00100 sizeram: 10075012:00003400 sizeram: sizem 0x80 sizeram: 10075012:00003400 sizeram: sizem 0x80 SMMGL0Init: 134086656 bytes SMMGL0Init: offset is 0xc7be0000 SMMGL0Init: AFTER write msr 0x10000026, val 0xfc7be040:0x400fffe0 writeglmsr: write msr 0x10000080, val 0x00000000:0x00000003 writeglmsr: AFTER write msr 0x10000080, val 0x00000000:0x00000003 writeglmsr: write msr 0x40000020, val 0x20000000:0x000fff80 writeglmsr: AFTER write msr 0x40000020, val 0x20000000:0x000fff80 writeglmsr: write msr 0x40000021, val 0x20000000:0x080fffe0 writeglmsr: AFTER write msr 0x40000021, val 0x20000000:0x080fffe0 writeglmsr: write msr 0x4000002d, val 0x20000000:0x00000003 writeglmsr: AFTER write msr 0x4000002d, val 0x20000000:0x00000003 sizeram: 10075012:00003400 sizeram: sizem 0x80 SysmemInit: enable for 128m bytes SysmemInit: AFTER write msr 0x40000029, val 0x20000007:0xfdf00100 SMMGL1Init: SMMGL1Init: AFTER write msr 0x40000023, val 0x20000040:0x400fffe0 writeglmsr: write msr 0x40000080, val 0x00000000:0x00000001 writeglmsr: AFTER write msr 0x40000080, val 0x00000000:0x00000001 writeglmsr: write msr 0x400000e3, val 0x60000000:0x033000f0 writeglmsr: AFTER write msr 0x400000e3, val 0x60000000:0x033000f0 GeodeLinkPriority: MSR 0x00002001 is 0x00000000:0x00000320 GeodeLinkPriority: MSR 0x00002001 will be set to 0x00000000:0x00000220 GeodeLinkPriority: MSR 0xc0002001 is 0x00000000:0x00040e80 GeodeLinkPriority: MSR 0xc0002001 will be set to 0x00000000:0x00040000 GeodeLinkPriority: MSR 0x80002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x80002001 will be set to 0x00000000:0x00000720 GeodeLinkPriority: MSR 0xa0002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0xa0002001 will be set to 0x00000000:0x00000010 GeodeLinkPriority: MSR 0x50002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x50002001 will be set to 0x00000000:0x00000027 GeodeLinkPriority: MSR 0x4c002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x4c002001 will be set to 0x00000000:0x00000001 GeodeLinkPriority: MSR 0x54002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x54002001 will be set to 0x00000000:0x00000622 GeodeLinkPriority: MSR 0x58002001 is 0x00000000:0x00000000 GeodeLinkPriority: MSR 0x58002001 will be set to 0x00000000:0x00000013 GLPCI r1: system msr.lo 0xfdf00100 msr.hi 0x20000007 GLPCI r1: system msr.lo 0x00100130 msr.hi 0x07fdf000 ClockGatingInit: MSR 0x10002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0x10002004 will be set to 0x00000000:0x00000005 ClockGatingInit: MSR 0x20002004 is 0x00000000:0x00000001 ClockGatingInit: MSR 0x20002004 will be set to 0x00000000:0x00000001 ClockGatingInit: MSR 0x40002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0x40002004 will be set to 0x00000000:0x00000005 ClockGatingInit: MSR 0x80002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0x80002004 will be set to 0x00000000:0x00000000 ClockGatingInit: MSR 0xa0002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0xa0002004 will be set to 0x00000000:0x00000001 ClockGatingInit: MSR 0xc0002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0xc0002004 will be set to 0x00000000:0x00000155 ClockGatingInit: MSR 0x4c002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0x4c002004 will be set to 0x00000000:0x00000015 ClockGatingInit: MSR 0x50002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0x50002004 will be set to 0x00000000:0x00000015 ClockGatingInit: MSR 0x54002004 is 0x00000000:0x00000000 ClockGatingInit: MSR 0x54002004 will be set to 0x00000000:0x00000000 Exit northbridgeinit Doing cpubug fixes for rev 0x21 CPU_BUG:eng2900 Done cpubug fixes is_5536: msr.lo is 0x5(==5 means 5536) is_5536: msr.lo is 0x5(==5 means 5536) is_5536: msr.lo is 0x5(==5 means 5536) NOTDOING ChipsetFlashSetup()!!!!!!!!!!!!!!!!!! is_5536: msr.lo is 0x5(==5 means 5536) sizeram: 10075012:00003400 sizeram: sizem 0x80 setup_gx2_cache: enable for 131072 KB msr 0x00001808 will be set to 25fff002:107fe000 MSR 0x10000026 is now 0x2c7be040:0x400fffe0 do_vsmbios compressed file len is supposed to be 60874 bytes computed len is 60874, file len is 60874 buf 00060000 *buf 186 buf[256k] 0 buf[0x20] signature is b0:10:e6:80 Call real_mode_switch_call_vsm biosint: INT# 0x15 biosint: eax 0xbea7 ebx 0x904e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x15f08 esp 0xff0 edi 0x1 esi 0x38 biosint: ip 0x5b3 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea7 biosint: INT# 0x15 biosint: eax 0xbea4 ebx 0x904e53 ecx 0x10000026 edx 0x10000028 biosint: ebp 0x15f08 esp 0xfee edi 0x1 esi 0x38 biosint: ip 0x5c1 cs 0x6000 flags 0x46 biosint: gs 0x0 fs 0x0 ds 0x6000 es 0x0 handleint21, eax 0xbea4 Finding PCI configuration type. PCI: Using configuration type 1 sizeram: 10075012:00003400 sizeram: sizem 0x80 gx2 north: end enable_dev PCI_DOMAIN: 0000 enabled PCI_DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 0 PCI: devfn 0x0, bad id 0xffffffff gx2 north: enable_dev gx2 north: end enable_dev PCI: 00:01.0 [100b/0028] ops PCI: 00:01.0 [100b/0028] enabled gx2 north: enable_dev gx2 north: end enable_dev PCI: 00:01.1 [100b/0030] enabled PCI: devfn 0xa, bad id 0xffffffff PCI: devfn 0xb, bad id 0xffffffff PCI: devfn 0xc, bad id 0xffffffff PCI: devfn 0xd, bad id 0xffffffff PCI: devfn 0xe, bad id 0xffffffff PCI: devfn 0xf, bad id 0xffffffff PCI: devfn 0x10, bad id 0xffffffff PCI: devfn 0x18, bad id 0xffffffff PCI: devfn 0x20, bad id 0xffffffff PCI: devfn 0x28, bad id 0xffffffff PCI: devfn 0x30, bad id 0xffffffff PCI: devfn 0x38, bad id 0xffffffff PCI: devfn 0x40, bad id 0xffffffff PCI: devfn 0x48, bad id 0xffffffff PCI: devfn 0x50, bad id 0xffffffff PCI: devfn 0x58, bad id 0xffffffff PCI: devfn 0x60, bad id 0xffffffff cs5536: southbridge_enable: dev is 0000f5a0 Disabling static device: PCI: 00:0d.0 PCI: devfn 0x69, bad id 0xffffffff PCI: devfn 0x6a, bad id 0xffffffff PCI: devfn 0x6b, bad id 0xffffffff PCI: devfn 0x6c, bad id 0xffffffff PCI: devfn 0x6d, bad id 0xffffffff PCI: devfn 0x6e, bad id 0xffffffff PCI: devfn 0x6f, bad id 0xffffffff PCI: devfn 0x70, bad id 0xffffffff cs5536: southbridge_enable: dev is 0000f300 PCI: 00:0f.0 [1022/2090] bus ops PCI: 00:0f.0 [1022/2090] enabled PCI: devfn 0x79, bad id 0xffffffff cs5536: southbridge_enable: dev is 0000f060 PCI: 00:0f.2 [1022/209a] enabled cs5536: southbridge_enable: dev is 0000edc0 PCI: 00:0f.3 [1022/2093] enabled cs5536: southbridge_enable: dev is 0000eb20 PCI: 00:0f.4 [1022/2094] enabled cs5536: southbridge_enable: dev is 0000e880 PCI: 00:0f.5 [1022/2095] enabled malloc Enter, size 668, free_mem_ptr 00016000 malloc 0x00016000 PCI: 00:0f.6 [1022/2096] enabled malloc Enter, size 668, free_mem_ptr 0001629c malloc 0x0001629c PCI: 00:0f.7 [1022/2097] enabled PCI: devfn 0x80, bad id 0xffffffff PCI: devfn 0x88, bad id 0xffffffff PCI: devfn 0x90, bad id 0xffffffff PCI: devfn 0x98, bad id 0xffffffff PCI: devfn 0xa0, bad id 0xffffffff PCI: devfn 0xa8, bad id 0xffffffff PCI: devfn 0xb0, bad id 0xffffffff PCI: devfn 0xb8, bad id 0xffffffff PCI: devfn 0xc0, bad id 0xffffffff PCI: devfn 0xc8, bad id 0xffffffff PCI: devfn 0xd0, bad id 0xffffffff PCI: devfn 0xd8, bad id 0xffffffff PCI: devfn 0xe0, bad id 0xffffffff PCI: devfn 0xe8, bad id 0xffffffff PCI: devfn 0xf0, bad id 0xffffffff PCI: devfn 0xf8, bad id 0xffffffff scan_static_bus for PCI: 00:0f.0 scan_static_bus for PCI: 00:0f.0 done PCI: pci_scan_bus returning with max=00 scan_static_bus for Root Device done done Allocating resources... Reading resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 northbridge.c:pci_domain_read_resources() PCI_DOMAIN: 0000 read_resources bus 0 link: 0 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done PCI: 00:0f.0 14 * [0x00000400 - 0x000004ff] io PCI: 00:0f.0 20 * [0x00000800 - 0x0000087f] io PCI: 00:0f.3 10 * [0x00000880 - 0x000008ff] io PCI: 00:0f.0 18 * [0x00000c00 - 0x00000c3f] io PCI: 00:0f.0 24 * [0x00000c40 - 0x00000c7f] io PCI: 00:0f.0 1c * [0x00000c80 - 0x00000c9f] io PCI: 00:0f.2 20 * [0x00000ca0 - 0x00000caf] io PCI: 00:0f.0 10 * [0x00000cb0 - 0x00000cb7] io PCI: 00:01.0 10 * [0x00000cc0 - 0x00000cc3] io Root Device compute_allocate_io: base: 00000cc4 size: 000008c4 align: 8 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:01.1 10 * [0x00000000 - 0x00ffffff] mem PCI: 00:01.1 14 * [0x01000000 - 0x01003fff] mem PCI: 00:01.1 18 * [0x01004000 - 0x01007fff] mem PCI: 00:01.1 1c * [0x01008000 - 0x0100bfff] mem PCI: 00:0f.6 10 * [0x0100c000 - 0x0100dfff] mem PCI: 00:0f.4 10 * [0x0100e000 - 0x0100efff] mem PCI: 00:0f.5 10 * [0x0100f000 - 0x0100ffff] mem PCI: 00:0f.7 10 * [0x01010000 - 0x01010fff] mem Root Device compute_allocate_mem: base: 01011000 size: 01011000 align: 24 gran: 0 done Done reading resources. Setting resources... Root Device compute_allocate_io: base: 00001000 size: 000008c4 align: 8 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:0f.0 14 * [0x00001000 - 0x000010ff] io PCI: 00:0f.0 20 * [0x00001400 - 0x0000147f] io PCI: 00:0f.3 10 * [0x00001480 - 0x000014ff] io PCI: 00:0f.0 18 * [0x00001800 - 0x0000183f] io PCI: 00:0f.0 24 * [0x00001840 - 0x0000187f] io PCI: 00:0f.0 1c * [0x00001880 - 0x0000189f] io PCI: 00:0f.2 20 * [0x000018a0 - 0x000018af] io PCI: 00:0f.0 10 * [0x000018b0 - 0x000018b7] io PCI: 00:01.0 10 * [0x000018c0 - 0x000018c3] io Root Device compute_allocate_io: base: 000018c4 size: 000008c4 align: 8 gran: 0 done Root Device compute_allocate_mem: base: fd000000 size: 01011000 align: 24 gran: 0 Root Device read_resources bus 0 link: 0 Root Device read_resources bus 0 link: 0 done PCI: 00:01.1 10 * [0xfd000000 - 0xfdffffff] mem PCI: 00:01.1 14 * [0xfe000000 - 0xfe003fff] mem PCI: 00:01.1 18 * [0xfe004000 - 0xfe007fff] mem PCI: 00:01.1 1c * [0xfe008000 - 0xfe00bfff] mem PCI: 00:0f.6 10 * [0xfe00c000 - 0xfe00dfff] mem PCI: 00:0f.4 10 * [0xfe00e000 - 0xfe00efff] mem PCI: 00:0f.5 10 * [0xfe00f000 - 0xfe00ffff] mem PCI: 00:0f.7 10 * [0xfe010000 - 0xfe010fff] mem Root Device compute_allocate_mem: base: fe011000 size: 01011000 align: 24 gran: 0 done Root Device assign_resources, bus 0 link: 0 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:01.0 10 <- [0x00000018c0 - 0x00000018c3] io PCI: 00:01.1 10 <- [0x00fd000000 - 0x00fdffffff] mem PCI: 00:01.1 14 <- [0x00fe000000 - 0x00fe003fff] mem PCI: 00:01.1 18 <- [0x00fe004000 - 0x00fe007fff] mem PCI: 00:01.1 1c <- [0x00fe008000 - 0x00fe00bfff] mem PCI: 00:0f.0 10 <- [0x00000018b0 - 0x00000018b7] io PCI: 00:0f.0 14 <- [0x0000001000 - 0x00000010ff] io PCI: 00:0f.0 18 <- [0x0000001800 - 0x000000183f] io PCI: 00:0f.0 1c <- [0x0000001880 - 0x000000189f] io PCI: 00:0f.0 20 <- [0x0000001400 - 0x000000147f] io PCI: 00:0f.0 24 <- [0x0000001840 - 0x000000187f] io PCI: 00:0f.2 20 <- [0x00000018a0 - 0x00000018af] io PCI: 00:0f.3 10 <- [0x0000001480 - 0x00000014ff] io PCI: 00:0f.4 10 <- [0x00fe00e000 - 0x00fe00efff] mem PCI: 00:0f.5 10 <- [0x00fe00f000 - 0x00fe00ffff] mem PCI: 00:0f.6 10 <- [0x00fe00c000 - 0x00fe00dfff] mem PCI: 00:0f.7 10 <- [0x00fe010000 - 0x00fe010fff] mem PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Done allocating resources. Enabling resources... PCI: 00:01.0 cmd <- 145 PCI: 00:01.1 subsystem <- 00/00 PCI: 00:01.1 cmd <- 143 cs5536: cs5536_pci_dev_enable_resources() PCI: 00:0f.0 cmd <- 149 PCI: 00:0f.2 subsystem <- 00/00 PCI: 00:0f.2 cmd <- 141 PCI: 00:0f.3 subsystem <- 00/00 PCI: 00:0f.3 cmd <- 141 PCI: 00:0f.4 subsystem <- 00/00 PCI: 00:0f.4 cmd <- 142 PCI: 00:0f.5 subsystem <- 00/00 PCI: 00:0f.5 cmd <- 142 PCI: 00:0f.6 cmd <- 142 PCI: 00:0f.7 cmd <- 142 done. Initializing devices... Root Device init OLPC REVA ENTER init OLPC REVA EXIT init APIC_CLUSTER: 0 init malloc Enter, size 668, free_mem_ptr 00016538 malloc 0x00016538 Initializing CPU #0 CPU: vendor NSC device 552 model_gx2_init Enabling cache model_gx2_init DONE CPU #0 Initialized PCI: 00:01.0 init northbridge: northbridge_init() irq_init_steering(0000FB40 [8000785C], AA5B) PCI: 00:01.1 init PCI: 00:0f.0 init cs5536: southbridge_init cs5536: southbridge_init: enable uarta, msr MDD_IRQM_YHIGH(51400021) cs5536: southbridge_init: enable_ide_nand_flash is 1 cs5536: enable_ide_nand_flash WARNING: using deprecated flash enable mechanism MDD_LBAR_FLSH0 was 0x0000000000000000 MDD_LBAR_FLSH0 is 0xfffff00720000000 MDD_PIN_OPT was 0x0000000000000f7d MDD_PIN_OPT is 0x0000000000000f7c MDD_NANDF_DATA was 0x0000000007770777 MDD_NANDF_DATA is 0x0000000000100010 MDD_NADF_CNTL was 0x0000000000000777 MDD_NADF_CNTL is 0x0000000000000010 cs5536: EXIT enable_ide_nand_flash Assigning IRQ 5 to 0:f.3 Readback = 5 pci_level_irq: current ints are 0x0 pci_level_irq: try to set ints 0x20 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 10 to 0:f.4 Readback = 10 pci_level_irq: current ints are 0x20 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 10 to 0:f.5 Readback = 10 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 10 to 0:f.6 Readback = 10 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Assigning IRQ 10 to 0:f.7 Readback = 10 pci_level_irq: current ints are 0x420 pci_level_irq: try to set ints 0x420 pci_level_irq: lower order bits are wrong: want 0x0, got 0x20 Disabling VPCI device: 0x80007E00 Disabling VPCI device: 0x80007F00 PCI: 00:0f.2 init PCI: 00:0f.3 init PCI: 00:0f.4 init PCI: 00:0f.5 init PCI: 00:0f.6 init PCI: 00:0f.7 init Devices initialized Copying IRQ routing tables to 0xf0000...done. Verifing copy of IRQ routing tables at 0xf0000...failed Moving GDT to 0x500...ok Wrote linuxbios table at: 00000530 - 000006b8 checksum 5633 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xfff10000 - 0xffff7fff Uncompressing to RAM 0x0001a000 olen = 0x0025a7c6 done. Found ELF candiate at offset 0 header_offset is 0 Try to load at offset 0x0 n_type: 00000001 n_name(8): ELFBoot n_desc(6): Linux n_type: 00000002 n_name(8): ELFBoot n_desc(7): unknown malloc Enter, size 20, free_mem_ptr 000167d4 malloc 0x000167d4 n_type: 00000003 n_name(8): ELFBoot n_desc(2): \0xf9j Dropping non PT_LOAD segment malloc Enter, size 32, free_mem_ptr 000167e8 malloc 0x000167e8 New segment addr 0x10000 size 0x1ab24 offset 0x124 filesize 0x561c (cleaned up) New segment addr 0x10000 size 0x1ab24 offset 0x124 filesize 0x561c lb: [0x0000000000004000, 0x000000000001a000) segment: [0x0000000000010000, 0x000000000001561c, 0x000000000002ab24) malloc Enter, size 32, free_mem_ptr 00016808 malloc 0x00016808 late: [0x000000000001a000, 0x000000000001a000, 0x000000000002ab24) bounce: [0x00000000077c0000, 0x00000000077c561c, 0x00000000077ca000) malloc Enter, size 32, free_mem_ptr 00016828 malloc 0x00016828 New segment addr 0x91000 size 0x70 offset 0x5740 filesize 0x0 (cleaned up) New segment addr 0x91000 size 0x70 offset 0x5740 filesize 0x0 lb: [0x0000000000004000, 0x000000000001a000) malloc Enter, size 32, free_mem_ptr 00016848 malloc 0x00016848 New segment addr 0x100000 size 0xfa964 offset 0x5740 filesize 0xe9086 (cleaned up) New segment addr 0x100000 size 0xfa964 offset 0x5740 filesize 0xe9086 lb: [0x0000000000004000, 0x000000000001a000) malloc Enter, size 32, free_mem_ptr 00016868 malloc 0x00016868 New segment addr 0x800000 size 0x16c000 offset 0xee7c6 filesize 0x16c000 (cleaned up) New segment addr 0x800000 size 0x16c000 offset 0xee7c6 filesize 0x16c000 lb: [0x0000000000004000, 0x000000000001a000) Loading Segment: addr: 0x00000000077c0000 memsz: 0x000000000000a000 filesz: 0x000000000000561c [ 0x00000000077c0000, 00000000077c561c, 0x00000000077ca000) <- 0000000000000124 Clearing Segment: addr: 0x00000000077c561c memsz: 0x00000000000049e4 Loading Segment: addr: 0x0000000000091000 memsz: 0x0000000000000070 filesz: 0x0000000000000000 [ 0x0000000000091000, 0000000000091000, 0x0000000000091070) <- 0000000000005740 Clearing Segment: addr: 0x0000000000091000 memsz: 0x0000000000000070 Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000fa964 filesz: 0x00000000000e9086 [ 0x0000000000100000, 00000000001e9086, 0x00000000001fa964) <- 0000000000005740 Clearing Segment: addr: 0x00000000001e9086 memsz: 0x00000000000118de Loading Segment: addr: 0x000000000001a000 memsz: 0x0000000000010b24 filesz: 0x0000000000000000 [ 0x000000000001a000, 000000000001a000, 0x000000000002ab24) <- 00000000000ee7c6 Clearing Segment: addr: 0x000000000001a000 memsz: 0x0000000000010b24 Loading Segment: addr: 0x0000000000800000 memsz: 0x000000000016c000 filesz: 0x000000000016c000 [ 0x0000000000800000, 000000000096c000, 0x000000000096c000) <- 00000000000ee7c6 83:stream_skip() - overflowed source buffer Loaded segments Image checksum: 6af9 != computed checksum: d8f8 Cannot Load ELF Image