Woodhouse on flash storage
tiagomnm at gmail.com
Tue Oct 6 05:00:48 EDT 2009
Trying to find datasheets of the flash chips to know what their erase
block size and page size(and number of erase cycles) has been a
nightmare for me, the manufacturer just doesn't care if your
partitioning choice ends up sending the SSD/SD/MMC sooner than the
Have you had the same experience?
On Mon, Oct 5, 2009 at 11:07 PM, Mitch Bradley <wmb at laptop.org> wrote:
> David might be right in principle, but when component price matters, you
> have to buy the hardware that the mass market offers. Right now the
> sweet spot is "smart" devices with embedded Flash Translation Layer
> firmware. I'd place my bet on that trend continuing.
> Linux does not "drive" the mass market. Asian volume manufacturers
> barely know what Linux is. Maybe that is changing, but there is a long
> way to go before the reality on the ground changes.
> David minimizes the impact of NAND geometry changes. The reality is
> that it doesn't have to change "that much" to "flip" the decision. We
> at OLPC tried in vain to find a way to get past 2 GiB with the internal
> NAND. The problem is that the controller hardware is coupled to the
> NAND technology (MLC vs SLC) and page size. The coupling is caused by
> the fact that the error correcting codes must be tuned to those
> factors. ECC for 2K-page SLC is just no good for 4K MLC. ECC
> generation and checking must be done in hardware for adequate
> performance. Our existing NAND controller just didn't work for the
> generation of chips that has largely supplanted the chips we were using.
> So get a new controller, right? Well, if you go and try to buy one, you
> will find that they all come with embedded microprocessors that
> implement a Flash Translation Layer, and the manufacturers closely guard
> the operational details. It would be nice if they would reveal their
> secrets so the FOSS community could write some "better" firmware for
> those controllers. Good luck making that happen. And good luck getting
> it deployed before the chip has been superseded.
> You might think that System on Chip devices for the embedded market
> might yield a different answer. That's not what we saw. Every time we
> looked at an SoC presentation, invariably the device did not have a
> suitable raw NAND controller. That is what started me to thinking that
> raw NAND was about to get killed in the market by "managed NAND".
> Everything these days has an SD controller or three.
> David is absolutely right that many of the current FTL-equipped devices
> are nearly hopeless. But that is not the same as saying that they all
> are. A few devices have done quite well in our stress testing. Over
> time, I expect the situation to get better and better as the firmware
> that "gets it right" supplants the earlier tries.
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