[OLPC-devel] Re: NAND flash controller speed.

David Woodhouse dwmw2 at infradead.org
Mon Jun 5 17:36:35 EDT 2006


On Fri, 2006-06-02 at 16:46 -0600, Tom Sylla wrote:
> At 33MHz:
> 1. 2.62MB/s
> 2. 2.75MB/s
> 3. 2.76MB/s
> mount "time" of 256MB flash in config 3: 2.70s 

So we're basically an order of magnitude under the speed at which the
flash chip can provide data, which is somewhat suboptimal.

Your idea of abusing an IDE bus is very cute -- it'll be interesting to
see how well we can make it work, although your I'm inclined to agree
with the end of your last message about it, where you say it may well
end up too fragile to be useful.

So we should continue to consider the possible alternatives... how much
would it cost for us to make an ASIC which replaces the on-board NAND
controller and runs at a decent speed? It isn't particularly complex,
and Thomas has a working implementation in VHDL which would just need to
be adapted to the OLPC board. Perhaps we could still connect it via the
IDE bus, or maybe there's a better option?

-- 
dwmw2




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