#12169 BLOC 4-hardw: XO-4 B1 SDHCI error on boot

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Fri Nov 2 21:33:04 EDT 2012

#12169: XO-4 B1 SDHCI error on boot
           Reporter:  rsmith         |       Owner:  wad             
               Type:  defect         |      Status:  new             
           Priority:  blocker        |   Milestone:  4-hardware      
          Component:  hardware       |     Version:  4-B1            
         Resolution:                 |    Keywords:  XO-4, SDHCI, OFW
        Next_action:  test in build  |    Verified:  0               
Deployment_affected:                 |   Blockedby:                  
           Blocking:                 |  
Changes (by wad):

  * next_action:  diagnose => test in build


 The OFW fix also requires svn 3412.   Otherwise, Linux doesn't play.

 Linux still requires a fix.  It now asserts eMMC_RST# properly but doesn't
 quite manage to restore communications with the eMMC.

 The root cause of the problem is leakage from the Marvell PXA2128 into the
 eMMC when the eMMC is powered down.  If the MMC interface in the SoC is
 connected to the pins, but the interface isn't powered up and clocked, the
 eMMC power line is held around 2.8V.  This means that on some units, the
 eMMC doesn't properly power-on-reset when power is turned on to +3.3V.

 Just adding a clamp isn't the solution.  Significant current is
 dissipated, and Linux still has problems.

 The above changes to CForth and OFW set the eMMC pins as GPIO inputs when
 not driving the eMMC (and ensure that there is time for the leakage across
 the caps to decay).

 Marvell's normal recommendation is to leave the eMMC tied to +3.3V
 (powered), and assert the eMMC reset line to reset it.  While we can use
 this within Linux, there is a chicken and egg problem if we also try to
 use it for OFW.   The eMMC has to be configured before it responds to the
 RESET# line.  If it is one of the 1% of units showing this problem, we
 would never get OFW to configure it properly.

Ticket URL: <http://dev.laptop.org/ticket/12169#comment:5>
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