#11085 BLOC 1.5-har: XO-1.75 Memory errors
Zarro Boogs per Child
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Wed Aug 17 15:54:50 EDT 2011
#11085: XO-1.75 Memory errors
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Reporter: wad | Owner: wad
Type: defect | Status: assigned
Priority: blocker | Milestone: 1.5-hardware-C
Component: ofw - open firmware | Version: 1.75-B1
Resolution: | Keywords: XO-1.75, memory
Next_action: reproduce | Verified: 0
Deployment_affected: | Blockedby:
Blocking: |
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Comment(by wad):
Q407mb has identical DRAM timing to Q4B05 (the one that this ticket
started with), with the exception of having auto power saving enabled.
A new timing (q4b07rb) is being generated for testing. The differences
between it and Q4B07 are:
SDRAM_CONFIG_TYPE1_CS0 (new: 00266430)
Change RTT_nominal from 001b to 011b
Change DRAM output drive strength from 000b to 001b
SDRAM_CTRL2 (new: 0f100010)
Change SDRAM line boundary from line_32B to line_64B (rec. by Marvell)
Enabled auto-precharge (rec. by Marvell)
SDRAM_CTRL6_ODT_CTRL
Enable ODT0 when writing to CS1 (rec. by Marvell)
SDRAM_CTRL7_ODT_CTRL2
Enable ODT1 when controlled by CTRL6 (rec. by Marvell)
SDRAM_CTRL8_ODT_CTRL2
Enable cross-page detection and arbitration
PHY_CTRL10
Enabled automatic pad calibration
PHY_CTRL7
Increase DQ PMOS driver strength from 0111b to 1111b
Increase DQ NMOS driver strength from 0111b to 1111b
PHY_CTRL8
Increase Address/Command PMOS driver strength from 0111b to 1111b
Increase Address/Command NMOS driver strength from 0111b to 1111b
This timing caused a data abort on a laptop that up to that point hadn't
showed any memory problems. It ran for 18 hours on 23 other laptops w.
no problems. Suspecting the automatic pad calibration (recommended by
Marvell engineer, but the register description says that enabling this is
not recommended). Q4B07rc is the same timing w. the automatic pad
calibration bit not set.
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Ticket URL: <http://dev.laptop.org/ticket/11085#comment:12>
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