#9481 LOW Not Tri: Reduce clock generator power

[Zarro Boogs per Child]

#9481: Reduce clock generator power
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 Reporter:  wmb at firmworks.com    |                 Owner:  wmb at firmworks.com
     Type:  defect               |                Status:  new              
 Priority:  low                  |             Milestone:  Not Triaged      
Component:  ofw - open firmware  |               Version:  not specified    
 Keywords:                       |           Next_action:  never set        
 Verified:  0                    |   Deployment_affected:                   
Blockedby:                       |              Blocking:                   
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 Dear: Mitch,

 Our clock gen current power consumption was 135mA X 3.3V= 445mW
 We notice that PCIe0~4 and 25Mhz SATA clock were still turn on ,
 VIA Stephen are talking about each PCIe port will consume 12mW,
 In this case, turn off PCIe 0~4 can save 60mW ,the total consumption will
 reduce to 445-60= 385mW - 25Mhz ,
 Could you help to turn off those ports for power saving and thermal issue?

 Dear: John,

 I just notice that when temperature go high , the clock gen will consume
 less power ,
 It is interesting behavior, did you notice that ?

 Sincerely yours
 Gary Chiang
 Hardware Engineer
 NB2 RD2
 TEL: +886-3-327-2345 Ext: 18332
 -----Original Message-----
 From: John Watlington [mailto:wad at laptop.org]
 Sent: Friday, April 10, 2009 10:54 PM
 To: StephenYang at via.com.tw
 Cc: John Watlington; WinCheng at viatech.com; PatrickChen at via.com.tw;
 vmb at media.mit.edu; Gordon Chu (朱彥光); Gary Chiang (江品逸); Beckham Chen (陳愈仁)
 Subject: Re: Clock Generator


 On Apr 10, 2009, at 4:29 AM, <StephenYang at via.com.tw> wrote:

 > > Dear John and Win,
 > > The clock generators support VX855 chipset include clock skew
 > > control with them.

 Exactly what are the required skews between what clocks ?

 Are the processor clock / graphics clock / LPC clock skews specified
 by the
 clock chip crucial ?

 John

 > > We are not sure if we can find a clock generator can meet the
 > > requirements.
 > >
 > > 0.5W, it’s almost same as what we measured before. However unused
 > > outputs may be different from platform to platform.

 > > To disable the unused outputs can save more power consumption
 > > (PCICLK is the most save-able output than others, around 12mW per
 > > output) , besides if not using DISPCLK , leave them unconnected can
 > > save more power consumption too.
 > >
 > > B.R.
 > > StephenYanh
 > >
 > > -----Original Message-----
 > > From: John Watlington [mailto:wad at laptop.org]
 > > Sent: Friday, April 10, 2009 3:29 PM
 > > To: Win Cheng
 > > Cc: John Watlington; Patrick Chen; Stephen Yang; vmb at media.mit.edu;
 > > gordon.chu at quantatw.com; gary.chiang at quantatw.com;
 > > Beckham.Chen at quantatw.com
 > > Subject: Re: Clock Generator
 > >
 > >
 > > We arrived at the 0.5W average consumption number for the 9UM702 by
 > > measuring the consumption in a VX800 laptop running conventional BIOS
 > > and Windows.   It didn't have PCIe slots, but that doesn't mean it
 > > had them disabled...
 > >
 > > John
 > >
 > > On Apr 10, 2009, at 3:23 AM, <WinCheng at viatech.com> wrote:
 > >
 >> >> Hi Stephen,
 >> >>
 >> >> Would you help John and Patrick on that ?
 >> >>
 >> >> Hi Patrick & Stephen,
 >> >>
 >> >> Some unused I/O pins of clock gen can be disabled or tristated for
 >> >> extra power saving  by the i2C control. Would you guys also double
 >> >> check on that for extra power saving possibility too?
 >> >>
 >> >> Thank you,
 >> >>
 >> >> -Win
 >> >>
 >> >> From: John Watlington [mailto:wad at laptop.org]
 >> >> Sent: Thu 4/9/2009 8:47 PM
 >> >> To: Patrick Chen
 >> >> Cc: John Watlington; Mike Bove; Win Cheng; "Gordon Chu (朱彥光)";
 >> >> Gary Chiang; Beckham.Chen at quantatw.com
 >> >> Subject: Clock Generator
 >> >>
 >> >>
 >> >> Patrick,
 >> >>     We are not comfortable waiting for IDT to produce the 9UM703
 >> >> as the only solution for clocking the C7-M/VX855 chipset.  The 350
 mW
 >> >> dissipation it promises is only a marginal improvement.
 >> >>
 >> >> There are a few points which make our clocking needs simpler than
 >> >> a generic C7-M/VX855 system:
 >> >> - No need for PCI-E clocks
 >> >> - Little need for the PCI clock
 >> >> - Fixed processor clock frequency
 >> >>
 >> >> This leaves us with a need for
 >> >> Spread spectrum'd 100 MHz, 66 MHz, 33 MHz,
 >> >>     with two differential drivers on the 100 MHz.
 >> >> Solid 48 MHz and 14.318.. MHz clocks.
 >> >> As none of these (except the two 100 MHz signals) need
 >> >> to be synchronous, and these frequencies are common, I'm
 >> >> sure we should be able to find a better (lower power, and
 >> >> either cheaper or not much more expensive) solution.
 >> >>
 >> >> Can you please help me contact IDT again about possible frequency
 >> >> synthesis solutions ?   The key is to not to find a solution ---
 >> >> there are
 >> >> many technical possibilities --- but to find a solution that uses
 >> >> parts
 >> >> already in high volume production.
 >> >>
 >> >> Regards,
 >> >> John
 >> >>
 >> >>

-- 
Ticket URL: <http://dev.laptop.org/ticket/9481>
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