[Trac #1017] swizzle and other DCON-related display problems

[Zarro Boogs per Child]

#1017: swizzle and other DCON-related display problems
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 Reporter:  AlbertCahalan  |        Owner:  blizzard
     Type:  defect         |       Status:  reopened
 Priority:  normal         |    Milestone:  BTest-3 
Component:  hardware       |   Resolution:          
 Keywords:                 |  
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Comment (by AlbertCahalan):

 Replying to [comment:5 vmb]:

 > (R >> 2) + (R >> 4) + (G >> 1) + (G >> 4) + (B >> 3)

 This notation looks like C, but the DCON document seems to indicate that
 operations like (R >> 4) do not discard the rightmost bits. I'm pretty
 sure you keep the bits that overlap between (R >> 2) and (R >> 4), but it
 isn't clear what happens with the rightmost 2 bits of (R >> 4). They could
 be discarded, (R >> 2) could be zero-extended on the right by 2 bits, or
 (R >> 2) could be extended on the right with a copy of the high two bits.
 I'm guessing the second method, though I think the third method may be a
 bit better.

 > Note also that the current DCON has only 16-bit color line buffers (cost
 and space, again), so there isn't going to be a lot of visual finesse
 available in any event.

 Page 5 of the DCON spec claims that 19-bit 6:7:6 color is stored in the
 line buffer. Is this incorrect?

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Ticket URL: <http://dev.laptop.org/ticket/1017#comment:6>
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