[Trac #835] Investigate 4M PTE/TLB caching on the Geode

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#835: Investigate 4M PTE/TLB caching on the Geode
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 Reporter:  marcelo  |       Owner:  marcelo
     Type:  defect   |      Status:  new    
 Priority:  normal   |   Milestone:  BTest-3
Component:  kernel   |    Keywords:         
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 {{{
 > On Wed, Jan 24, 2007 at 04:29:32PM -0500, Andres Salomon wrote:
 >  > Hi,
 >  >
 >  > The olpc-2.6 config that was inherited from Fedora has
 >  > CONFIG_PHYSICAL_START=0x400000.  We're not using kdump, and the geode
 >  > can't handle big PTEs; any reason why we shouldn't change this back
 to
 >  > the default 0x100000?
 >
 > Aligning on a 4MB boundary instead of 1MB has theoretical performance
 wins.
 > (The geode does have large pages right? And largepage TLBs ?)

 It does support 4M PTE's, we need to confirm that its functioning
 properly though.

 It might be incompatible with Intel's implementation and require special
 support:

 5.5.2.56 Data Memory Configuration Register

 Bit     Name
 11      P4MDIS
 Disable 4M PTE Cache.
 0: Enable 4M PTEs to be cached. Normal operation.
 1: Prevent 4M PTEs from being cached and flush any existing entries.


 As for 4M TLB caching:

 5.5.2.75 L2 TLB/DTE Index Register

 Bit     Name
 17:16   L2TLB_SEL
 0x: Select L2 TLB.
 10: Select DTE cache.
 11: Select 4M PTE cache.

 However I'm not sure that means it supports caching 4M pages in the TLB.

-- 
Ticket URL: <http://dev.laptop.org/ticket/835>
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